Years ago, true in-circuit emulator (ICE) pods provided bonded-out processor chips that gave designers access to internal chip signals. Most microcontrollers now support on-chip debug, background debug mode, or JTAG-like interface that simplifies program development and debugging, and usually accommodates programming flash memory from a host computer.

In early February 2010, Macraigor Systems announced it had added the Intel Atom processor to the list of devices that its on-chip debug technology, named OCDemon, works with. That's what made me recall the older "ice boxes" developers had to buy for thousands of dollars. And the compatible tools they had to add to their purchase to use the ice boxes. Compare those costs with the Macraigor OCDemon for the Intel Atom and XScale families, which costs only $US 250. And the company offers a version of the GNU tools for the Atom processor and full support of the Eclipse Ganymede/Galileo platform at no charge. How times change. Find Macraigor at: www.macraigor.com. The company's products and technologies go beyond this single module and are worth investigating.

Debugging capabilities that use a hardwired JTAG-like interface do not require firmware in a processor, so they work well when you must debug firmware or boot-loader code. And, these interfaces do not require an underlying operating system. They just plug in and work on an out-of-the-box development board or prototype. Of course, the dev board or prototype must have a JTAG-like interface designed to provide communications with the processor chip.

I found the application note, "Designing Embedded Systems For Testability," October 2007, (Order Number: 318518-001US) in Intel's online "Embedded Design Center at: download.intel.com/design/intarch/applnots/318518.pdf. The app note focuses on the JTAG test-access port (TAP) controller, eXtended Debug Port (XDP), and the XOR facilities provided on the Intel Atom processor chips. It provides design information for engineers who must implement test-and-debug ports on their own boards.

Intel also published the app note, "Debug Port Design Guide for UP/DP Systems," June 2006, and available at: download.intel.com/design/Pentium4/guides/31337301.pdf. I'd bet UP stands for microprocessor (?P) and DP stands for debug port. There's no glossary in this app note.

Keep in mind that although chip manufacturers often call a test-and-debug port a "JTAG port," or a "boundary-scan" port, many do not fully implement the IEEE 1149 boundary-scan specification, even though they use the same signal names and timing. If you must implement true IEEE 1149 boundary-scan tests for other parts of a circuit or system, you might need a different connection and you will need different boundary-scan specific software.

--Jon Titus